[christianw.]

Zitat:| Customer Comment 2012-10-09 06:38:09 PST
| By: Christian Weidner
|
| Hello Matthew,
|
| just a short question for your power-supply, does it contains any
|
| current limit?
|
| 200mA on startup would mean a worse ESR for the bulk-capacitors
| or a
| soft power-supply.
|
|
| I now did a new layout to place a new batch of chips onto this.
| Capacitor is 16SVP330M OSCon
|
| ESR max: 16mR @ 100kHz
| rated Ripple current: 4720 mArms
|
| Startup via Power Supply (12V 5A) is shown on
| "max9704_v3_startup_psu.png".
| As you may note, the startup time is shorter than the one you
| measured.
|
| Setting a current of ~35-40mA on powersupply give the measurents
| shown in
| "max9704_v3_startup_psu_with_current_limit.png" and
| "max9704_v3_startup_psu_with_current_limit_zoom.png".
|
| So our question is, does the chip needs a soft-start on the
| VDD-line?
| (600µs [me] vs. 10ms [you]).
|
| Someone stated that it may help to limit the dI/dt on startup,
| but this
| wouldn't make sense to me.
|
|
| I may have some idea about the faults.
|
| When switching power via a common switch there is always some
| bouncing
| on the swithing line.
|
| On the very first measurement it is shown like 3-4x times where
| the VDD
| is "breaking" away.
|
| (Image attached)
|
| May you try to setup a power-cycle-sweep like this?
|
| Regards,
|
| Christian W.

Antwort:

Zitat:|================================================================
| Staff Comment 2012-10-09 16:05:23 PST
| By: Matthew M
|
| Hello Christian,
|
| The supply I used had a rather high current limit (>7A). I will
| check into this as soon as I can return to the lab.
|
| I appreciate your patience,
|
| Matthew Mowdy
| Audio Applications Engineer