[zilog]

I have attached a .ASC to my UcD, it works but has much distortion (0.5%-ish), could somebody look at it and give me hints to where this distortion comes from? It also has problems with starting, and in some configurations it start/stops working in phase with the input signal.
It would also be nice if someone could help me with the calculations of feedback/lead network values as I dont understand putzey's equations well enough to discover values with other method than by random picking and simulating.

Kind Regards
Daniel Nilsson

https://stromrichter.org/d-amp/content/i...og_ucd.asc

[SSassen]

Hi Dan,

A few things come to mind:

- no need for full diff. just use the most basic modulator from Bruno's patent
- use the IR2011, not the IR2010, it is much better suited
- you need an input buffer, else it won't work in practice
- you need deadtime control, currently there is none but for delay in the components

Hope this gets you on the right track, else just post any follow-up questions here and I'll do my best to answer them.

Best regards,

Sander.

[zilog]

Thanks for the input, I have put this design aside for now and have gone for a fully discrete implementation, I guess you will get questions regarding that aswell

[SSassen]

Zitat:Thanks for the input, I have put this design aside for now and have gone for a fully discrete implementation, I guess you will get questions regarding that aswell

Sure, feel free to post them here, I'll do my best to answer them for you. Keep in mind that if you go discrete you need to keep a close eye on each individual component's dissipation.

Cheers,

Sander.