[christianw.]

Maxim schrieb mir folgendes:

Zitat:| Hello Christian,
|
| I am looking at your start up waveform and it doesn't look like a
| smooth start up. Is this a 12V supply ramping or a battery
| through a switch, and where is the voltage for those waveforms
| measure with respect to the supply and the MAX9704? It looks like
| the part maybe jumps in and out of shutdown as the supply ramps
| up from 0V to 12V, and that the supply dips at each transient
| (the spike to droop to flat waveform to rise again waveforms
| shown).
|
| This is potentially a result of tying /SHDN to the supply through
| a 10nF cap and to the REG pin through a 10kΩ resistor. This is
| NOT a recommended configuration for how to connect /SHDN and REG
| should not be used to enable / disable the device. Please drive
| the /SHDN pin with an independent control signal or (for always
| on operation) use a divider to the supply that will place the
| voltage at /SHDN above the turn on threshold when the high supply
| is fully ramped (VIH is 2.5V, and the supply is 12V - so design
| the divider to place the voltage at /SHDN above 2.5V when the
| supply ramps).
|
| It may be helpful in your current configuration to monitor the
| voltage at REG and /SHDN as the 12V supply ramps (as shown in the
| supplied images) as seeing all three together during sequencing
| would reveal if their is a problem.
|
| I can describe what is likely happening based on the description
| from the data sheet for REG (page 10):
|
| "VREG is not available as a logic voltage high in shutdown mode.
| Do not apply VREG as a 6V potential to surrounding system
| components."
|
| I suspect as the 12V supply ramps, the cap (C13) pulls /SHDN high
| and drags VREG along with it. The the chip briefly enables once
| the supply ramps high enough, turning REG on (which is a low
| impedance output at GND before it ramps up). This (since
| capacitor voltage cannot change instantaneously, and is current
| limited to REG through a 10k resistor from the cap) pulls down on
| the supply which then causes the "droop" and the device to shut
| back down which turns REG back off. This appears to happen 3
| times as the supply sequences in each case shown before the
| supply finally reaches 12V and the system equalizes.
|
| The question I have is where are the waveforms provided measured
| (as I am unsure)? Is it a battery through a switch that you are
| connecting, or a 12V regulated supply? Is the supply itself
| dipping (and if so can it handle the surge current)? Have you
| tried powering up the supply fully with shutdown held low, and
| then taking the device out of shutdown (and does the supply dip
| then)?
|
| Bottom line, I cannot help with further debug until you stop
| using REG (which is disabled when the device is in shutdown) to
| control the /SHDN pin (which is required to exit shutdown and
| turn REG on to take the device out of shutdown). This is
| circular! REG is only intended to be used on G1/G2 and FS1/2 -
| and should not be used for any other externally functionality at
| all - including /SHDN. Once we correct this problem, we can
| determine if there are any other potential system design issues
| (such as those mention in the previous paragraph).
|
| Thank you for your patience,
|
| Matthew Mowdy
| Audio Applications Engineer

[voltwide]

Das ist ja schon mal eine zielführende Antwort.
Ich hatte ja auch schon mal die Steuerung eines enable-pins angesprochen, das ist hier der beschriebenen /shutdown-Eingang. Die bottom line sagt klar, dass man diesen nicht aus dem internen Reglerausgang betreiben soll. Sondern über einen Spannungsteiler aus der Betriebsspannung, der so einzustellen ist, das /shutdown-Abschaltschwelle erst dann erreicht ist wenn die Betriebsspannung sicher oberhalb von PowerGood aufgebaut ist.

In der Praxis nimmt man einen relativ hochohmigen Spannungsteiler mit zusätzlichem Verzögerungskondensator und gut is. So mache ich das bei meinen chips auch. Noch besser wäre ein reset-GeberBaustein, weil damit die Streuung der /shutdown-Schaltschwelle nicht mehr eingeht in den Einschaltzeitpunkt.

[christianw.]

Moin,

ich hab das jetzt auf 10k-10k Spannungsteiler von VDD umgebaut. Wer hätte es erwartet, der Problem ist... genauso.

Ich habe mal zusätzlich REG und /SHDN gemessen, WTF?


VDD gelb, REG blau:



VDD gelb, /SHDN blau:

[christianw.]

Meine Antwort an Maxim:

Zitat:Hello Matthew,

thanks for your reply, i really appreciate your support.

At first, i fixed the issue you told me. I need to say, that the capacitive pull-up is a solution we have simulated and discussed with our engineering professor. I now did a simple voltage divider 10k-10k from VDD to AGND, /SHDN is connected to the middle (VDD/2).

There now is no connection from /SHDN to REG anymore.

For the measures, voltage is measured directly on the power-supply-plug on our testboard. (VDD to PGND)

The power-supply is a 12.6V Li-Ion cell which is capable of delivering 10 amps max.

I also crosschecked using a regulated power-supply (Delta Elektronika ES 030-5) - same result.

Having a 0R33 in the supplyline gives an inrush-current of nearly 8amps peak.

Testing the circuit with a battery is for the matter, that the regulated power-supply is showing some regulation influences on start-up, caused by the inrush current.

Concerning the attached measures, the yellow graph shows the power-supply line, while blue is either /SHDN or REG. As i said before, there is no external connection between those to lines anymore.

Results behave same as before, something strange is going on - even if /SHDN is connected via 10k directly to VDD.

Might there be some kind of punch-through?

Kindly regards,

Christian W.

[voltwide]

Interessant. Ich schlage vor, das ganze mal zu messen mit /shutdown=statisch low.

[christianw.]

Ich hab auf der defekten Platine den Chip ausgetauscht und dann mit diesen gemessen.

Astreine Log-Fkt. beim starten.

Allerdings hat der jetzige 2x47u, und die Platine unter Test 2x220u.

Wenn ich testweise einen Standard-Elko dazulöte (470u), kann ich das nichtmehr triggern, halt kein Low-ESR.

Somit darf man wohl sagen, das der andere entweder Pre-Fail ist, oder nie richtig funktioniert.

Der hier vorher defekte ist übrigens ohne kapazitiven Pull-Up gestorben.

[christianw.]

For reference, my additional input to Matthew,

Zitat:Dear Matthew,

additional to the mail from today,

i now have changed the faulty ic on a different testboard, which failed without having the capacitive pull-up at no time.

Testing the signals on this chip gives excellent boot-up-performance with just showing a nice log-function caused by the bulk-capacity. /SHDN is also without any problems.

So i guess, the IC i mentioned before is in a stage of pre-fail.

As i say first, the faulty chip never had this C13 between VDD and /SHDN.

The failed IC marks:

ETJ 102
NNHH3GT


The "strange" IC we talked before marks:

ETJ 105
NNHH3GT


The replacement IC marks:

ETJ 015
NNHH3GT


Kindly regards,


Christian W.

[voltwide]

Hm, was meinst Du mit "kapazitivem pullup"?

[christianw.]

C13, das was er in der Email ansprach. 10nF von /SHDN auf VDD.

Aber Kommando zurück, gerade den IC getauscht (TQFN, ich liebe es.. ), der Neue zeigt gleiches Verhalten.

[voltwide]

Na da bin ich aber Beruhigung

[voltwide]

Tschuldigung, ist mir so rausgerutscht

[christianw.]

--

[voltwide]

starte doch mal mit /shutdown=statisch low

[christianw.]

Oh man, die beiden 100nf direkt am Chip waren das Problem. Habe die nun getauscht und alles sieht gut aus.

Edit:

Zum Vervollständigung:

Vorher waren 0805 100nF X7R 50V drauf, jetzt 1206 100nF X7R 50V.
Die Platine mit dem defekten Chip hat diese 100nF Kondensatoren bereits.

Was mich daran erinnert, Parallelshaltungen von Kondensatoren enden unter ungünstigen Bedingungen in einem Schwingkreis mit nicht gewollter Polstelle.

Der Chip is einfach Schice.

[christianw.]

Da ist er nun.



Der Lötstop ist ausm Laserdrucker, hat die Heissluftorgie (auslöten/einlöten) ganz überstanden. Bei ~220°C wird er flüssig, somit eher Korrosionsschutz als Lötstop - für Paste gehts aber ganz gut, muss hat viel Restring angelegt werden.

Auf der linken Seite sitzt das Digitalpoti mit Tastern und Leds.

Natürlich MAXIM. (MAX5486)

[Rumgucker]

Zitat:Original geschrieben von christianw.
Da ist er nun.

Ist der süß

Dein Basteltrieb erstaunt mich. Du machst die Projekte schneller als man gucken kann

[christianw.]

Eigentlich sollte da der F-Gen rein, die Platinen für den Pot und den Amp waren schon fertig, nur eben ohne Gehäuse.

F-Gen is nun so:



Ein Prof. meinte mal: "Bastler bauen funktionierende Geräte.", das habe ich ihm übel genommen.

[voltwide]

Zitat:Original geschrieben von christianw.


Ein Prof. meinte mal: "Bastler bauen funktionierende Geräte.", das habe ich ihm übel genommen.

Der kannte die Maxim-IC's noch nicht!

[christianw.]

Manchmal funktionieren sie ja. Wie z.B. MAX1771 als Step-Up. Bringt auch 100V aus 4V wenn er muss. Nur wehe du näherst dich auf 100mV ans VDD Limit.. ;Bru1

[christianw.]

For reference:

Zitat:Dear Matthew,

thanks for the reply,

to answer you questions i will do via inline quoting.

To clarify what we are speaking about:

Board1 is the board with the chip which failed to death.
Is has the 1206 100nF C11/C12 at all time. /SHDN is done via voltage divider. Bulk-capacity is 2x47u LowESR.

Board2 is the board with the chip which showed the wires startup behavior. Is now has the 1206 100nF C11/C12, changed from 0805 100nF. /SHDN is now done (fixed from C pullup ) via voltage divider. Bulk-capacity is 2x220u LowESR.

This is the board i measured and showed you the images.

All further things belongs to Board2.


> | I am glad to hear you found the supply issue. Now that you have
> | replaced the bad supply bypass capacitance, do both boards show a
> | smooth supply ramp up during power sequencing (a small spike when
> | the device comes out of shutdown may be normal)?

Well the spikes might be due to the bulk capacitance? (2x220u)


> | As to the units being damaged during sequencing, was this
> | occurring on all boards or just board 1 (the one with the bad
> | bypass). Are units only damaged during power-up, or does it
> | sometimes happen during normal operation (IE the device is
> | running normally for a long time and suddenly dies)?

The damage happened to board1 and some other boards. We did several to have one for each student in our group. The damage always happened on powerup with either a loud "clicking/pumping" sound coming from the speakers or having a full DC on the speakers. It never happens on the long run. We also had the phenomenon that only one channel fails, while the other still runs okay for some time. (So there were no load connected on the failty output)

What makes me thought-provoking is, that the short-circuit and/or thermal-protection never kicked in when this happens. So the output-stages wont get disabled.

One thing that come in my mind is, that running the IC in SSM (670kHz +/-7) results in some desync which results in a shoot-through.


> | I am a bit confused by this statement:
> | "When having no load connected, the output spike-swing is as
> | twice as high as with connected load. (24V vs. 12V)"
> |
> | The class D switching waveforms (the high frequency carrier)
> | should switch from GND to VDD (12V in this case). When you say
> | 24V versus 12V - I assume your speaking differentially.

Yes thats right, i meant differentially.

> | Is the
> | signal amplitude (the actual audio) or the switching amplitude
> | (carrier) varying? Do you have any scope shots of the behavior?
> |

I'll attach 2 images of this. There were no audio connected as well as no load (speakers)

> | Also, are you using an output filter (in addition to the load) or
> | are you operating "filter-less" to the load? What precisely is
> | your load (not shown in the schematic but stated to be 8ohm).

The IC is running in a filterless configuration. Speakers are stated as 8ohms. (2way with internall crossover)

> | What is the effective inductance of the speaker load, what is
> | your output filter/zobel (if any), and what is the cable /trace
> | length to the load (etc. any additional relevant information
> | could be helpful).
> |

Cable length is about 60 centimeters. The effetive inductance is unknown, i don't have any equip to measure this, esspecially over the full frequency-range.

> | Please clarify exactly what conditions and when the failures are
> | happening and on which board(s). If possible, clarify exactly
> | what the remaining problems are (if any) that you'd like some
> | assistance or advice on so I can assess how best to proceed.
> | Also, if possible, please continue to operate using a voltage
> | divider based enable for the shutdown pin for the duration of
> | this debug (I understand the other solution may work, but I want
> | to limit the number of differences between your circuit for debug
> | and the standard operating circuit).

Thats mainly "all" problems, but i mean it is a big problem. I need to state that one IC is also failed while no load where connected. We just noticed this by the current-limiter in our PSU.

As for the MAX9709 there is no problem so far, no fails even on 100% workload.

-----------------------------------

Thanks for your patience, i really appreciate your support and service policy.

Kindly regards,


Christian W.