[christianw.]

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Zitat: Quote: Originally Posted by doctormord View Post I mean compensation of capacitive resistance caused by stray capacitance. When I.e. switching at 3Mhz and 1pf stray capacitance this will render to 50kOhm capacitive resistance. This must be compensated somehow, otherwise the voltages at the netpoints aren't right.

Zitat:No problem here, thanks to the very clean and compact SMT design and 4 layer PCB, any stray capacitance are too low to matter much. I even choose to use only 7 bit from each shift register, as the 8th bit are located on the other side of the chip... And the 470 pF capacitor at the output of the R-2R resistor chain take care of anything coming though. The results can be seen at the FFT plots, so clean....

Zitat: Originally Posted by soekris View Post No problem here, thanks to the very clean and compact SMT design and 4 layer PCB, any stray capacitance are too low to matter much.

Zitat:How low is your stray capacitance between your traces? In my old I/V DAC design some x pF have mattered. Also take care after time, where some dirt comes over/between the soldering SMD's..

Zitat:Haven't calculated trace stray capacitance, just did my best to keep things separated at layout and have the analog signals on the top side, with digital signals to the shift registers on the bottom side. Again, the advantage of the sign magnitude R-2R dac is that MSB bits are NOT switching when not used, so you don't have large signals straying into low levels analog signals. That's also why you don't need de-glitching on a sign magnitude DAC, there simply aren't any glitches.... Those "spurious power harmonics" are more than -140 db down and mostly likely from the EMU-0404, as my initial testing are powered from my lab power supply.... I also really need better test equipment, the choice seems to be between real audio analyzers starting at $10K, or inadequate low cost AD/DA boxes like the EMU-0404. Something in between are needed, that might be my next project