[Basstler]

Mal ne Aussage aus der LTSpice Group

Zitat:> Does anyone have any suggestions on what can be done to fix this
> problem with the simulation not progressing?

Probably your simulation is unrealistically constructed in a way
that thwarts the natural convergence mechanisms of LTspice, but it
is impossible to say without having a look at it. I am sure I or
someone else could get it running smoothly in short order if you
could upload it to the Temp folder in our Group's files section
(read the group Description on the homepage for details).

Have you tried selecting the Alternate solver (it's in the Control
Panel SPICE tab). IF the simulation gets past the sticky spots by
selecting the Alternate solver (it has more numerical resolution/ dynamic
range), this is a sure indication the your simulation needs
convergence tweaking.

In order to get good transient convergence, a good model should as
much as possible contain elements with voltage inputs and current
outputs. This means that Norton equivalents should be used to
produce voltage sources (LTspice will do this for you automatically
if you fill in any non-zero value for a voltage source's series resistance).
The only exception to this rule is when using zero
volt sources for current sensing (these should always be zero ohms).

It can't be stressed enough that stiff voltage sources (especially
nonlinear behavioral types) are problematic because, unlike current
sources and/or resistors, they will not yield to capacitances at
small time steps during convergence difficulties in a transient
analysis.

Whenever the simulator reduces the time step, it is because of
nonlinear circuit behavior. The assumption implicit in this
strategy is that as the time step is reduced, the various parasitic
and stray capacitances will come to dominate the nonlinear circuit
bits (which don't depend on time). At very small time steps, only
the capacitances will matter and, since capacitances are linear,
the circuit will converge and the simulator will be able to get
past the nonlinear behavior. Of course this can't work if the
models omit the "parasitic" capacitances (and resistances to work
against).

To follow these rules means that p/n junctions (and other nonlinear
element nodes) should never be without some series resistance and
some parallel capacitance. As good as it is, LTspice is not magic,
and the old maxim "garbage in - garbage out" still applies. Many,
if not most, third party subcircuit models are poorly written in
this regard (don't let a big company name fool you).

Many subcircuits contain generic ideal diodes and transistors that
completely leave out the junction capacitance and resistances. Is
this perhaps true in your case? Please check it out and report
back what you find (or better still, upload your circuit).

Regards -- analogspiceman

Ach ja ...