Version 4
SHEET 1 1536 680
WIRE 896 48 224 48
WIRE 480 128 272 128
WIRE 688 128 480 128
WIRE 800 128 688 128
WIRE 272 144 272 128
WIRE 480 144 480 128
WIRE 224 160 224 128
WIRE 224 160 144 160
WIRE 256 160 224 160
WIRE 464 160 320 160
WIRE 576 160 528 160
WIRE 640 160 576 160
WIRE 224 176 224 160
WIRE 144 192 144 160
WIRE 496 208 496 176
WIRE 800 208 704 208
WIRE 288 224 288 176
WIRE 800 224 800 208
WIRE 688 240 688 128
WIRE 224 256 144 256
WIRE 576 256 576 160
WIRE 576 256 224 256
WIRE 640 256 640 240
WIRE 672 256 640 256
WIRE 816 256 736 256
WIRE 896 256 896 48
WIRE 896 256 816 256
WIRE 704 272 704 208
WIRE 816 320 816 256
WIRE 640 384 640 256
WIRE 816 384 640 384
FLAG 496 208 0
FLAG 800 224 0
FLAG 288 224 0
SYMBOL Digital\\inv-mos 464 192 R0
SYMATTR InstName 5
SYMATTR SpiceModel ainv
SYMATTR Prefix X
SYMBOL voltage 800 112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL Digital\\inv-mos 672 288 R0
SYMATTR InstName U1
SYMATTR SpiceModel ainv
SYMATTR Prefix X
SYMBOL res 624 144 R0
SYMATTR InstName R1
SYMATTR Value 5k
SYMBOL cap 800 320 R0
SYMATTR InstName C1
SYMATTR Value 560p
SYMBOL Digital\\inv-mos 256 192 R0
SYMATTR InstName U2
SYMATTR SpiceModel ainv
SYMATTR Prefix X
SYMBOL res 208 32 R0
SYMATTR InstName R2
SYMATTR Value 5k
SYMBOL res 208 160 R0
WINDOW 0 34 52 Left 0
WINDOW 3 26 120 Left 0
SYMATTR InstName R3
SYMATTR Value 12k
SYMBOL cap 128 192 R0
WINDOW 3 13 89 Left 0
SYMATTR InstName C2
SYMATTR Value 20p
TEXT 216 496 Left 0 !.subckt ainv in out avdd avss\nr1 in in2  300\nm1 out in2 avss avss nmos1 L=1u W=50u\nm2 out in2 avdd avdd pmos1 L=1u W=100u\n.model nmos1 nmos(level=2 vto=700m kp=100u lambda=50m  cgso=1n cgdo=1n cgbo=1n cbd=30p cbs=30p)\n.model pmos1 pmos(level=2 vto=-700m kp=50u lambda=50m  cgso=1n cgdo=1n cgbo=1n cbd=30p cbs=30p)\n.ends
TEXT 216 440 Left 0 !.tran 0 150u 100u 10n