(kicad_pcb (version 4) (host pcbnew 4.0.6)

  (general
    (links 63)
    (no_connects 32)
    (area 139.9808 85.597599 159.023809 123.902401)
    (thickness 1.6)
    (drawings 0)
    (tracks 0)
    (zones 0)
    (modules 41)
    (nets 10)
  )

  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x00030_80000001)
      (usegerberextensions false)
      (excludeedgelayer true)
      (linewidth 0.500000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (hpglpenoverlay 2)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )

  (net 0 "")
  (net 1 "Net-(C1-Pad1)")
  (net 2 "Net-(C1-Pad2)")
  (net 3 "Net-(C2-Pad2)")
  (net 4 "Net-(C3-Pad1)")
  (net 5 "Net-(C3-Pad2)")
  (net 6 "Net-(C4-Pad2)")
  (net 7 GND)
  (net 8 "Net-(C5-Pad2)")
  (net 9 "Net-(C6-Pad2)")

  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net GND)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C1-Pad2)")
    (add_net "Net-(C2-Pad2)")
    (add_net "Net-(C3-Pad1)")
    (add_net "Net-(C3-Pad2)")
    (add_net "Net-(C4-Pad2)")
    (add_net "Net-(C5-Pad2)")
    (add_net "Net-(C6-Pad2)")
  )

  (module 00:Cap_0603 (layer F.Cu) (tedit 5415D631) (tstamp 59360CF9)
    (at 155.5 99 90)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (path /5935BD77)
    (attr smd)
    (fp_text reference C1 (at 0 -1.9 90) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 220n (at 0 1.9 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
    (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:Cap_0603 (layer F.Cu) (tedit 5415D631) (tstamp 59360D05)
    (at 155.5 102.5 270)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (path /5935C0AA)
    (attr smd)
    (fp_text reference C2 (at 0 -1.9 270) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 220n (at 0 1.9 270) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
    (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad2)"))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:Cap_0603 (layer F.Cu) (tedit 5415D631) (tstamp 59360D11)
    (at 155.5 106.25 90)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (path /5935C0EF)
    (attr smd)
    (fp_text reference C3 (at 0 -1.9 90) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 220n (at 0 1.9 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
    (pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(C3-Pad1)"))
    (pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(C3-Pad2)"))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:Cap_0603 (layer F.Cu) (tedit 5415D631) (tstamp 59360D1D)
    (at 155.5 109.5 270)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (path /5935C11F)
    (attr smd)
    (fp_text reference C4 (at 0 -1.9 270) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 220n (at 0 1.9 270) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
    (pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(C3-Pad1)"))
    (pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(C4-Pad2)"))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:Cap_0603 (layer F.Cu) (tedit 5415D631) (tstamp 59360D29)
    (at 151.5 97.25)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (path /5935C31B)
    (attr smd)
    (fp_text reference C5 (at 0 -1.9) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 1u0 (at 0 1.9) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
    (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(C5-Pad2)"))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:Cap_0603 (layer F.Cu) (tedit 5415D631) (tstamp 59360D35)
    (at 151.75 111.75)
    (descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
    (tags "capacitor 0603")
    (path /5935C2CE)
    (attr smd)
    (fp_text reference C6 (at 0 -1.9) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 1u0 (at 0 1.9) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.45 -0.75) (end 1.45 -0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.45 -0.75) (end -1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.45 -0.75) (end 1.45 0.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.15))
    (pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask)
      (net 9 "Net-(C6-Pad2)"))
    (model Capacitors_SMD.3dshapes/C_0603.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:CapPol_10x20mm_RM5 (layer F.Cu) (tedit 0) (tstamp 59360D41)
    (at 148 91.25 90)
    (descr "Capacitor, pol, cyl 10x20mm")
    (path /5935C3D7)
    (fp_text reference C7 (at 0 -6.6 90) (layer F.SilkS)
      (effects (font (thickness 0.3048)))
    )
    (fp_text value 220u (at 0 6.6 90) (layer F.SilkS)
      (effects (font (thickness 0.3048)))
    )
    (fp_line (start -2.7 -4.5) (end 2.7 -4.5) (layer F.SilkS) (width 0.3048))
    (fp_line (start 2.3 -4.7) (end -2.3 -4.7) (layer F.SilkS) (width 0.3048))
    (fp_line (start 1.9 -4.9) (end -1.9 -4.9) (layer F.SilkS) (width 0.3048))
    (fp_line (start -1.3 -5.1) (end 1.3 -5.1) (layer F.SilkS) (width 0.3048))
    (fp_circle (center 0 0) (end -5.3 0) (layer F.SilkS) (width 0.3048))
    (fp_line (start 1.5 -3.25) (end 3 -3.25) (layer F.SilkS) (width 0.5))
    (pad 1 thru_hole rect (at 0 2.5 90) (size 1.8 1.8) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 8 "Net-(C5-Pad2)"))
    (pad 2 thru_hole circle (at 0 -2.5 90) (size 1.8 1.8) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND))
    (model walter/capacitors/cp_10x20mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:CapPol_10x20mm_RM5 (layer F.Cu) (tedit 0) (tstamp 59360D4D)
    (at 148 118.25 90)
    (descr "Capacitor, pol, cyl 10x20mm")
    (path /5935C896)
    (fp_text reference C8 (at 0 -6.6 90) (layer F.SilkS)
      (effects (font (thickness 0.3048)))
    )
    (fp_text value 220u (at 0 6.6 90) (layer F.SilkS)
      (effects (font (thickness 0.3048)))
    )
    (fp_line (start -2.7 -4.5) (end 2.7 -4.5) (layer F.SilkS) (width 0.3048))
    (fp_line (start 2.3 -4.7) (end -2.3 -4.7) (layer F.SilkS) (width 0.3048))
    (fp_line (start 1.9 -4.9) (end -1.9 -4.9) (layer F.SilkS) (width 0.3048))
    (fp_line (start -1.3 -5.1) (end 1.3 -5.1) (layer F.SilkS) (width 0.3048))
    (fp_circle (center 0 0) (end -5.3 0) (layer F.SilkS) (width 0.3048))
    (fp_line (start 1.5 -3.25) (end 3 -3.25) (layer F.SilkS) (width 0.5))
    (pad 1 thru_hole rect (at 0 2.5 90) (size 1.8 1.8) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 9 "Net-(C6-Pad2)"))
    (pad 2 thru_hole circle (at 0 -2.5 90) (size 1.8 1.8) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND))
    (model walter/capacitors/cp_10x20mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:case_HTSSOP-32_6.1x11mm_Pitch0.65mm_longpads (layer F.Cu) (tedit 5935D8A4) (tstamp 59360D7E)
    (at 147.75 104.5)
    (descr "TSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf)")
    (tags "SSOP 0.65")
    (path /5935DC05)
    (attr smd)
    (fp_text reference U1 (at 0 -6.55) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value IC_TPA3128D2 (at 0 6.55) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_circle (center -2.25 -4.75) (end -2 -4.75) (layer F.SilkS) (width 0.15))
    (fp_line (start -4.5 -5.8) (end -4.5 5.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start 4.5 -5.8) (end 4.5 5.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start -4.5 -5.8) (end 4.5 -5.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start -4.5 5.8) (end 4.5 5.8) (layer F.CrtYd) (width 0.05))
    (fp_line (start -3.175 -5.625) (end -3.175 -5.3) (layer F.SilkS) (width 0.15))
    (fp_line (start 3.175 -5.625) (end 3.175 -5.3) (layer F.SilkS) (width 0.15))
    (fp_line (start 3.175 5.625) (end 3.175 5.3) (layer F.SilkS) (width 0.15))
    (fp_line (start -3.175 5.625) (end -3.175 5.3) (layer F.SilkS) (width 0.15))
    (fp_line (start -3.175 -5.625) (end 3.175 -5.625) (layer F.SilkS) (width 0.15))
    (fp_line (start -3.175 5.625) (end 3.175 5.625) (layer F.SilkS) (width 0.15))
    (fp_line (start -3.175 -5.3) (end -4.25 -5.3) (layer F.SilkS) (width 0.15))
    (pad 1 smd rect (at -4.15 -4.875) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 2 smd rect (at -4.15 -4.225) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 3 smd rect (at -4.15 -3.575) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 4 smd rect (at -4.15 -2.925) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 5 smd rect (at -4.15 -2.275) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 6 smd rect (at -4.15 -1.625) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 7 smd rect (at -4.15 -0.975) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 8 smd rect (at -4.15 -0.325) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 9 smd rect (at -4.15 0.325) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 10 smd rect (at -4.15 0.975) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 11 smd rect (at -4.15 1.625) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 12 smd rect (at -4.15 2.275) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 13 smd rect (at -4.15 2.925) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 14 smd rect (at -4.15 3.575) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 15 smd rect (at -4.15 4.225) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 16 smd rect (at -4.15 4.875) (size 2 0.4) (layers F.Cu F.Paste F.Mask))
    (pad 17 smd rect (at 4.15 4.875) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 9 "Net-(C6-Pad2)"))
    (pad 18 smd rect (at 4.15 4.225) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 9 "Net-(C6-Pad2)"))
    (pad 19 smd rect (at 4.15 3.575) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 9 "Net-(C6-Pad2)"))
    (pad 20 smd rect (at 4.15 2.925) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 6 "Net-(C4-Pad2)"))
    (pad 21 smd rect (at 4.15 2.275) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(C3-Pad1)"))
    (pad 22 smd rect (at 4.15 1.625) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 23 smd rect (at 4.15 0.975) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 4 "Net-(C3-Pad1)"))
    (pad 24 smd rect (at 4.15 0.325) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 5 "Net-(C3-Pad2)"))
    (pad 25 smd rect (at 4.15 -0.325) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 26 smd rect (at 4.15 -0.975) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 3 "Net-(C2-Pad2)"))
    (pad 27 smd rect (at 4.15 -1.625) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 28 smd rect (at 4.15 -2.275) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 7 GND))
    (pad 29 smd rect (at 4.15 -2.925) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 1 "Net-(C1-Pad1)"))
    (pad 30 smd rect (at 4.15 -3.575) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 2 "Net-(C1-Pad2)"))
    (pad 31 smd rect (at 4.15 -4.225) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(C5-Pad2)"))
    (pad 32 smd rect (at 4.15 -4.875) (size 2 0.4) (layers F.Cu F.Paste F.Mask)
      (net 8 "Net-(C5-Pad2)"))
    (pad 33 thru_hole rect (at 0 0) (size 5.4 10) (drill 2) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND))
    (model Housings_SSOP.3dshapes/TSSOP-32_6.1x11mm_Pitch0.65mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936670B)
    (at 145.8 100.2)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E3C7)
    (fp_text reference VIA1 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366710)
    (at 147 100.2)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E1DF)
    (fp_text reference VIA2 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366715)
    (at 148.2 100.2)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E3BB)
    (fp_text reference VIA3 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936671A)
    (at 149.4 100.2)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E1D3)
    (fp_text reference VIA4 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936671F)
    (at 145.75 101.4)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E3AF)
    (fp_text reference VIA5 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366724)
    (at 145.75 102.6)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E153)
    (fp_text reference VIA6 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366729)
    (at 145.75 103.8)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E3A3)
    (fp_text reference VIA7 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936672E)
    (at 145.75 105)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E062)
    (fp_text reference VIA8 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366733)
    (at 145.75 106.2)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E837)
    (fp_text reference VIA9 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366738)
    (at 148.2 101.4)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E807)
    (fp_text reference VIA10 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936673D)
    (at 145.8 107.4)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E82B)
    (fp_text reference VIA11 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366742)
    (at 145.8 108.6)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E7FB)
    (fp_text reference VIA12 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366747)
    (at 147 101.4)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E81F)
    (fp_text reference VIA13 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936674C)
    (at 147 102.6)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E7EF)
    (fp_text reference VIA14 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366751)
    (at 148.2 102.6)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E813)
    (fp_text reference VIA15 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 59366756)
    (at 149.4 101.4)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5935E7E3)
    (fp_text reference VIA16 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6CD)
    (at 149.4 102.6)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA81)
    (fp_text reference VIA17 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6D2)
    (at 149.4 103.8)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA51)
    (fp_text reference VIA18 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6D7)
    (at 147 106.2)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA75)
    (fp_text reference VIA19 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6DC)
    (at 147 107.4)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA45)
    (fp_text reference VIA20 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6E1)
    (at 147 108.6)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA69)
    (fp_text reference VIA21 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6E6)
    (at 149.4 105)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA39)
    (fp_text reference VIA22 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6EB)
    (at 148.2 106.2)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA5D)
    (fp_text reference VIA23 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6F0)
    (at 148.2 107.4)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA2D)
    (fp_text reference VIA24 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6F5)
    (at 148.2 108.6)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AAE1)
    (fp_text reference VIA25 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6FA)
    (at 149.4 106.2)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AAB1)
    (fp_text reference VIA26 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A6FF)
    (at 149.4 107.4)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AAD5)
    (fp_text reference VIA27 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A704)
    (at 149.4 108.6)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AAA5)
    (fp_text reference VIA28 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A709)
    (at 139.8 106.8)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AAC9)
    (fp_text reference VIA29 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A70E)
    (at 139.8 106.8)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA99)
    (fp_text reference VIA30 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A713)
    (at 139.8 106.8)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AABD)
    (fp_text reference VIA31 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

  (module 00:Via_0.3 (layer F.Cu) (tedit 5522B04F) (tstamp 5936A718)
    (at 139.8 106.8)
    (descr "VIA 0.3mm")
    (tags "VIA, 03, 0.3,")
    (path /5935DFD7/5936AA8D)
    (fp_text reference VIA32 (at 0 0.5715) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (fp_text value VIA (at 0 -0.762) (layer F.SilkS) hide
      (effects (font (size 0.5 0.5) (thickness 0.1)))
    )
    (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu *.Mask F.SilkS)
      (net 7 GND) (solder_mask_margin -0.05) (zone_connect 2))
  )

)
